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<div class="header">
  <div class="summary">
<a href="#nested-classes">Data Structures</a> &#124;
<a href="#define-members">Macros</a> &#124;
<a href="#typedef-members">Typedefs</a> &#124;
<a href="#enum-members">Enumerations</a> &#124;
<a href="#var-members">Variables</a>  </div>
  <div class="headertitle"><div class="title">TVIIBE1M 64-LQFP<div class="ingroups"><a class="el" href="group__group__hal__impl.html">CAT1 Implementation Specific</a> &raquo; <a class="el" href="group__group__hal__impl__pin__package.html">Pins</a></div></div></div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<p >Pin definitions and connections specific to the TVIIBE1M 64-LQFP package. </p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr class="memitem:structcyhal__resource__pin__mapping__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a></td></tr>
<tr class="memdesc:structcyhal__resource__pin__mapping__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">Represents an association between a pin and a resource.  <a href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">More...</a><br /></td></tr>
<tr class="separator:structcyhal__resource__pin__mapping__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:gadbcb21726bedc8b2e4f1bb2e0235035d"><td class="memItemLeft" align="right" valign="top"><a id="gadbcb21726bedc8b2e4f1bb2e0235035d" name="gadbcb21726bedc8b2e4f1bb2e0235035d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_GET_GPIO</b>(port,  pin)&#160;&#160;&#160;((((uint8_t)(port)) &lt;&lt; 3U) + ((uint8_t)(pin)))</td></tr>
<tr class="memdesc:gadbcb21726bedc8b2e4f1bb2e0235035d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets a pin definition from the provided port and pin numbers. <br /></td></tr>
<tr class="separator:gadbcb21726bedc8b2e4f1bb2e0235035d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae0af2ee8c5a2a2e6661962b368d1f2ba"><td class="memItemLeft" align="right" valign="top"><a id="gae0af2ee8c5a2a2e6661962b368d1f2ba" name="gae0af2ee8c5a2a2e6661962b368d1f2ba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_GET_PIN</b>(pin)&#160;&#160;&#160;((uint8_t)(((uint8_t)pin) &amp; 0x07U))</td></tr>
<tr class="memdesc:gae0af2ee8c5a2a2e6661962b368d1f2ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro that, given a gpio, will extract the pin number. <br /></td></tr>
<tr class="separator:gae0af2ee8c5a2a2e6661962b368d1f2ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga015f256578abd5638668ff19b9dc89d5"><td class="memItemLeft" align="right" valign="top"><a id="ga015f256578abd5638668ff19b9dc89d5" name="ga015f256578abd5638668ff19b9dc89d5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_GET_PORT</b>(pin)&#160;&#160;&#160;((uint8_t)(((uint8_t)pin) &gt;&gt; 3U))</td></tr>
<tr class="memdesc:ga015f256578abd5638668ff19b9dc89d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro that, given a gpio, will extract the port number. <br /></td></tr>
<tr class="separator:ga015f256578abd5638668ff19b9dc89d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3cd43fc956862ad59f73e28719951c5b"><td class="memItemLeft" align="right" valign="top"><a id="ga3cd43fc956862ad59f73e28719951c5b" name="ga3cd43fc956862ad59f73e28719951c5b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CANFD_TTCAN_RX</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga3cd43fc956862ad59f73e28719951c5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for canfd_ttcan_rx. <br /></td></tr>
<tr class="separator:ga3cd43fc956862ad59f73e28719951c5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa204ca86ffbc1b1425ff244251415b6d"><td class="memItemLeft" align="right" valign="top"><a id="gaa204ca86ffbc1b1425ff244251415b6d" name="gaa204ca86ffbc1b1425ff244251415b6d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CANFD_TTCAN_TX</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gaa204ca86ffbc1b1425ff244251415b6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for canfd_ttcan_tx. <br /></td></tr>
<tr class="separator:gaa204ca86ffbc1b1425ff244251415b6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7ee06358e90a33c3c02c51d9749271e1"><td class="memItemLeft" align="right" valign="top"><a id="ga7ee06358e90a33c3c02c51d9749271e1" name="ga7ee06358e90a33c3c02c51d9749271e1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_CAL_SUP_NZ</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga7ee06358e90a33c3c02c51d9749271e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_cal_sup_nz. <br /></td></tr>
<tr class="separator:ga7ee06358e90a33c3c02c51d9749271e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0bc31eb11c55a0a3a4a3dea5241fdb1f"><td class="memItemLeft" align="right" valign="top"><a id="ga0bc31eb11c55a0a3a4a3dea5241fdb1f" name="ga0bc31eb11c55a0a3a4a3dea5241fdb1f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_CLK_FM_PUMP</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga0bc31eb11c55a0a3a4a3dea5241fdb1f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_clk_fm_pump. <br /></td></tr>
<tr class="separator:ga0bc31eb11c55a0a3a4a3dea5241fdb1f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9ae562f4e1a742e6e7dcf31b06b0eaec"><td class="memItemLeft" align="right" valign="top"><a id="ga9ae562f4e1a742e6e7dcf31b06b0eaec" name="ga9ae562f4e1a742e6e7dcf31b06b0eaec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_FAULT_OUT</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga9ae562f4e1a742e6e7dcf31b06b0eaec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_fault_out. <br /></td></tr>
<tr class="separator:ga9ae562f4e1a742e6e7dcf31b06b0eaec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b66e06a7123fe76e42e132764b4a69b"><td class="memItemLeft" align="right" valign="top"><a id="ga8b66e06a7123fe76e42e132764b4a69b" name="ga8b66e06a7123fe76e42e132764b4a69b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_SWJ_SWCLK_TCLK</b>&#160;&#160;&#160;(CY_GPIO_DM_PULLDOWN)</td></tr>
<tr class="memdesc:ga8b66e06a7123fe76e42e132764b4a69b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_swj_swclk_tclk. <br /></td></tr>
<tr class="separator:ga8b66e06a7123fe76e42e132764b4a69b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ac645a03a58b04107a745d3a711de8d"><td class="memItemLeft" align="right" valign="top"><a id="ga8ac645a03a58b04107a745d3a711de8d" name="ga8ac645a03a58b04107a745d3a711de8d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_SWJ_SWDIO_TMS</b>&#160;&#160;&#160;(CY_GPIO_DM_PULLUP)</td></tr>
<tr class="memdesc:ga8ac645a03a58b04107a745d3a711de8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_swj_swdio_tms. <br /></td></tr>
<tr class="separator:ga8ac645a03a58b04107a745d3a711de8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad019c0b133fdf6f7dc5dae836cfe8f5c"><td class="memItemLeft" align="right" valign="top"><a id="gad019c0b133fdf6f7dc5dae836cfe8f5c" name="gad019c0b133fdf6f7dc5dae836cfe8f5c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_SWJ_SWDOE_TDI</b>&#160;&#160;&#160;(CY_GPIO_DM_PULLUP)</td></tr>
<tr class="memdesc:gad019c0b133fdf6f7dc5dae836cfe8f5c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_swj_swdoe_tdi. <br /></td></tr>
<tr class="separator:gad019c0b133fdf6f7dc5dae836cfe8f5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd74ce587fa555c8650a802012fcbc95"><td class="memItemLeft" align="right" valign="top"><a id="gadd74ce587fa555c8650a802012fcbc95" name="gadd74ce587fa555c8650a802012fcbc95"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_SWJ_SWO_TDO</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gadd74ce587fa555c8650a802012fcbc95"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_swj_swo_tdo. <br /></td></tr>
<tr class="separator:gadd74ce587fa555c8650a802012fcbc95"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga705128944c5d2488548532596b9add12"><td class="memItemLeft" align="right" valign="top"><a id="ga705128944c5d2488548532596b9add12" name="ga705128944c5d2488548532596b9add12"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_SWJ_TRSTN</b>&#160;&#160;&#160;(CY_GPIO_DM_PULLUP)</td></tr>
<tr class="memdesc:ga705128944c5d2488548532596b9add12"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_swj_trstn. <br /></td></tr>
<tr class="separator:ga705128944c5d2488548532596b9add12"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga05e76b82d7531ae0d9b403c8b9382db6"><td class="memItemLeft" align="right" valign="top"><a id="ga05e76b82d7531ae0d9b403c8b9382db6" name="ga05e76b82d7531ae0d9b403c8b9382db6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_TRACE_CLOCK</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga05e76b82d7531ae0d9b403c8b9382db6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_trace_clock. <br /></td></tr>
<tr class="separator:ga05e76b82d7531ae0d9b403c8b9382db6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6ba1c6630f89a2fed5771a88c5baf5d4"><td class="memItemLeft" align="right" valign="top"><a id="ga6ba1c6630f89a2fed5771a88c5baf5d4" name="ga6ba1c6630f89a2fed5771a88c5baf5d4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_TRACE_DATA</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga6ba1c6630f89a2fed5771a88c5baf5d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_trace_data. <br /></td></tr>
<tr class="separator:ga6ba1c6630f89a2fed5771a88c5baf5d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff87317f650292aac66c1ce11bd64b07"><td class="memItemLeft" align="right" valign="top"><a id="gaff87317f650292aac66c1ce11bd64b07" name="gaff87317f650292aac66c1ce11bd64b07"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_LIN_LIN_EN</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gaff87317f650292aac66c1ce11bd64b07"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for lin_lin_en. <br /></td></tr>
<tr class="separator:gaff87317f650292aac66c1ce11bd64b07"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga103ec4f23580d558657ed6b57cde5789"><td class="memItemLeft" align="right" valign="top"><a id="ga103ec4f23580d558657ed6b57cde5789" name="ga103ec4f23580d558657ed6b57cde5789"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_LIN_LIN_RX</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga103ec4f23580d558657ed6b57cde5789"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for lin_lin_rx. <br /></td></tr>
<tr class="separator:ga103ec4f23580d558657ed6b57cde5789"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf8f95e20bf8c7e699bccaab260a615cd"><td class="memItemLeft" align="right" valign="top"><a id="gaf8f95e20bf8c7e699bccaab260a615cd" name="gaf8f95e20bf8c7e699bccaab260a615cd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_LIN_LIN_TX</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gaf8f95e20bf8c7e699bccaab260a615cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for lin_lin_tx. <br /></td></tr>
<tr class="separator:gaf8f95e20bf8c7e699bccaab260a615cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga94b975c961309d278169b4912fe28ef0"><td class="memItemLeft" align="right" valign="top"><a id="ga94b975c961309d278169b4912fe28ef0" name="ga94b975c961309d278169b4912fe28ef0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_PASS_SAR_EXT_MUX_EN</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga94b975c961309d278169b4912fe28ef0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for pass_sar_ext_mux_en. <br /></td></tr>
<tr class="separator:ga94b975c961309d278169b4912fe28ef0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad9f68834cb7c93d12843f539f61e07cc"><td class="memItemLeft" align="right" valign="top"><a id="gad9f68834cb7c93d12843f539f61e07cc" name="gad9f68834cb7c93d12843f539f61e07cc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_PASS_SAR_EXT_MUX_SEL</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gad9f68834cb7c93d12843f539f61e07cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for pass_sar_ext_mux_sel. <br /></td></tr>
<tr class="separator:gad9f68834cb7c93d12843f539f61e07cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa4a0b9678341c62534d22b954a825e8a"><td class="memItemLeft" align="right" valign="top"><a id="gaa4a0b9678341c62534d22b954a825e8a" name="gaa4a0b9678341c62534d22b954a825e8a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_PASS_SARMUX_PADS</b>&#160;&#160;&#160;(CY_GPIO_DM_ANALOG)</td></tr>
<tr class="memdesc:gaa4a0b9678341c62534d22b954a825e8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for pass_sarmux_pads. <br /></td></tr>
<tr class="separator:gaa4a0b9678341c62534d22b954a825e8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga02bf919af595cef48bee3cd806aa34d2"><td class="memItemLeft" align="right" valign="top"><a id="ga02bf919af595cef48bee3cd806aa34d2" name="ga02bf919af595cef48bee3cd806aa34d2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_PERI_TR_IO_INPUT</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga02bf919af595cef48bee3cd806aa34d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for peri_tr_io_input. <br /></td></tr>
<tr class="separator:ga02bf919af595cef48bee3cd806aa34d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga398974f343b22b299471dc52c29a1c37"><td class="memItemLeft" align="right" valign="top"><a id="ga398974f343b22b299471dc52c29a1c37" name="ga398974f343b22b299471dc52c29a1c37"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_PERI_TR_IO_OUTPUT</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga398974f343b22b299471dc52c29a1c37"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for peri_tr_io_output. <br /></td></tr>
<tr class="separator:ga398974f343b22b299471dc52c29a1c37"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa02073e8f6e8a250aeb851a5976eb92c"><td class="memItemLeft" align="right" valign="top"><a id="gaa02073e8f6e8a250aeb851a5976eb92c" name="gaa02073e8f6e8a250aeb851a5976eb92c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_I2C_SCL</b>&#160;&#160;&#160;(CY_GPIO_DM_OD_DRIVESLOW)</td></tr>
<tr class="memdesc:gaa02073e8f6e8a250aeb851a5976eb92c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_i2c_scl. <br /></td></tr>
<tr class="separator:gaa02073e8f6e8a250aeb851a5976eb92c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf36de7401e064efcc2b803c835bbd94f"><td class="memItemLeft" align="right" valign="top"><a id="gaf36de7401e064efcc2b803c835bbd94f" name="gaf36de7401e064efcc2b803c835bbd94f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_I2C_SDA</b>&#160;&#160;&#160;(CY_GPIO_DM_OD_DRIVESLOW)</td></tr>
<tr class="memdesc:gaf36de7401e064efcc2b803c835bbd94f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_i2c_sda. <br /></td></tr>
<tr class="separator:gaf36de7401e064efcc2b803c835bbd94f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa74b19db04790a5988f287e7b343f599"><td class="memItemLeft" align="right" valign="top"><a id="gaa74b19db04790a5988f287e7b343f599" name="gaa74b19db04790a5988f287e7b343f599"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_CLK</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gaa74b19db04790a5988f287e7b343f599"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_clk. <br /></td></tr>
<tr class="separator:gaa74b19db04790a5988f287e7b343f599"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd51be129e3d547477caa66ba0c6bf66"><td class="memItemLeft" align="right" valign="top"><a id="gafd51be129e3d547477caa66ba0c6bf66" name="gafd51be129e3d547477caa66ba0c6bf66"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_MISO</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gafd51be129e3d547477caa66ba0c6bf66"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_miso. <br /></td></tr>
<tr class="separator:gafd51be129e3d547477caa66ba0c6bf66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga55ca1d04c27a976fa5941c416473b20b"><td class="memItemLeft" align="right" valign="top"><a id="ga55ca1d04c27a976fa5941c416473b20b" name="ga55ca1d04c27a976fa5941c416473b20b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_MOSI</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga55ca1d04c27a976fa5941c416473b20b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_mosi. <br /></td></tr>
<tr class="separator:ga55ca1d04c27a976fa5941c416473b20b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga86eeebaf595ecbf4d449c74122dd8b42"><td class="memItemLeft" align="right" valign="top"><a id="ga86eeebaf595ecbf4d449c74122dd8b42" name="ga86eeebaf595ecbf4d449c74122dd8b42"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_SELECT0</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga86eeebaf595ecbf4d449c74122dd8b42"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_select0. <br /></td></tr>
<tr class="separator:ga86eeebaf595ecbf4d449c74122dd8b42"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga318ce843790a53d67e48f4a313f816c1"><td class="memItemLeft" align="right" valign="top"><a id="ga318ce843790a53d67e48f4a313f816c1" name="ga318ce843790a53d67e48f4a313f816c1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_SELECT1</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga318ce843790a53d67e48f4a313f816c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_select1. <br /></td></tr>
<tr class="separator:ga318ce843790a53d67e48f4a313f816c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga803b92e83981ec41e43631ef1053d394"><td class="memItemLeft" align="right" valign="top"><a id="ga803b92e83981ec41e43631ef1053d394" name="ga803b92e83981ec41e43631ef1053d394"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_SELECT2</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga803b92e83981ec41e43631ef1053d394"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_select2. <br /></td></tr>
<tr class="separator:ga803b92e83981ec41e43631ef1053d394"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9f1267e1d5dcd2bb8ef2cc7fbf4af828"><td class="memItemLeft" align="right" valign="top"><a id="ga9f1267e1d5dcd2bb8ef2cc7fbf4af828" name="ga9f1267e1d5dcd2bb8ef2cc7fbf4af828"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_SELECT3</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga9f1267e1d5dcd2bb8ef2cc7fbf4af828"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_select3. <br /></td></tr>
<tr class="separator:ga9f1267e1d5dcd2bb8ef2cc7fbf4af828"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4063871044d7a566b58b5b0955b56d55"><td class="memItemLeft" align="right" valign="top"><a id="ga4063871044d7a566b58b5b0955b56d55" name="ga4063871044d7a566b58b5b0955b56d55"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_CLK</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga4063871044d7a566b58b5b0955b56d55"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_clk. <br /></td></tr>
<tr class="separator:ga4063871044d7a566b58b5b0955b56d55"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2b6f3b9a4229f16e16191644d7a021ec"><td class="memItemLeft" align="right" valign="top"><a id="ga2b6f3b9a4229f16e16191644d7a021ec" name="ga2b6f3b9a4229f16e16191644d7a021ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_MISO</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga2b6f3b9a4229f16e16191644d7a021ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_miso. <br /></td></tr>
<tr class="separator:ga2b6f3b9a4229f16e16191644d7a021ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8e3a1c1ca5ed736ce59dbf11547e6ce"><td class="memItemLeft" align="right" valign="top"><a id="gac8e3a1c1ca5ed736ce59dbf11547e6ce" name="gac8e3a1c1ca5ed736ce59dbf11547e6ce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_MOSI</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gac8e3a1c1ca5ed736ce59dbf11547e6ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_mosi. <br /></td></tr>
<tr class="separator:gac8e3a1c1ca5ed736ce59dbf11547e6ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9574bec687f52f612c85880c0285787c"><td class="memItemLeft" align="right" valign="top"><a id="ga9574bec687f52f612c85880c0285787c" name="ga9574bec687f52f612c85880c0285787c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT0</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga9574bec687f52f612c85880c0285787c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_select0. <br /></td></tr>
<tr class="separator:ga9574bec687f52f612c85880c0285787c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf2b36390a895539ae18d8e5a661642ef"><td class="memItemLeft" align="right" valign="top"><a id="gaf2b36390a895539ae18d8e5a661642ef" name="gaf2b36390a895539ae18d8e5a661642ef"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT1</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gaf2b36390a895539ae18d8e5a661642ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_select1. <br /></td></tr>
<tr class="separator:gaf2b36390a895539ae18d8e5a661642ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae6f130fdc79bade0b25b31d39bab151c"><td class="memItemLeft" align="right" valign="top"><a id="gae6f130fdc79bade0b25b31d39bab151c" name="gae6f130fdc79bade0b25b31d39bab151c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT2</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gae6f130fdc79bade0b25b31d39bab151c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_select2. <br /></td></tr>
<tr class="separator:gae6f130fdc79bade0b25b31d39bab151c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadf69720f4b9406d51715cf1b7b3a085b"><td class="memItemLeft" align="right" valign="top"><a id="gadf69720f4b9406d51715cf1b7b3a085b" name="gadf69720f4b9406d51715cf1b7b3a085b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT3</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gadf69720f4b9406d51715cf1b7b3a085b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_select3. <br /></td></tr>
<tr class="separator:gadf69720f4b9406d51715cf1b7b3a085b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga25dd33bcc5f3fba5b23fb4d5d056e476"><td class="memItemLeft" align="right" valign="top"><a id="ga25dd33bcc5f3fba5b23fb4d5d056e476" name="ga25dd33bcc5f3fba5b23fb4d5d056e476"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_UART_CTS</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga25dd33bcc5f3fba5b23fb4d5d056e476"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_uart_cts. <br /></td></tr>
<tr class="separator:ga25dd33bcc5f3fba5b23fb4d5d056e476"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9bfa51d83fd3fd131ff45de5d68c5c9e"><td class="memItemLeft" align="right" valign="top"><a id="ga9bfa51d83fd3fd131ff45de5d68c5c9e" name="ga9bfa51d83fd3fd131ff45de5d68c5c9e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_UART_RTS</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga9bfa51d83fd3fd131ff45de5d68c5c9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_uart_rts. <br /></td></tr>
<tr class="separator:ga9bfa51d83fd3fd131ff45de5d68c5c9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga54e48d58c2a0ca7b205fa0868a41844c"><td class="memItemLeft" align="right" valign="top"><a id="ga54e48d58c2a0ca7b205fa0868a41844c" name="ga54e48d58c2a0ca7b205fa0868a41844c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_UART_RX</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga54e48d58c2a0ca7b205fa0868a41844c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_uart_rx. <br /></td></tr>
<tr class="separator:ga54e48d58c2a0ca7b205fa0868a41844c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga90d6cd790e46fac220149ced8a6cf67d"><td class="memItemLeft" align="right" valign="top"><a id="ga90d6cd790e46fac220149ced8a6cf67d" name="ga90d6cd790e46fac220149ced8a6cf67d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_UART_TX</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga90d6cd790e46fac220149ced8a6cf67d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_uart_tx. <br /></td></tr>
<tr class="separator:ga90d6cd790e46fac220149ced8a6cf67d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae412e083c2cc451e231e97921df65207"><td class="memItemLeft" align="right" valign="top"><a id="gae412e083c2cc451e231e97921df65207" name="gae412e083c2cc451e231e97921df65207"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TCPWM_LINE</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gae412e083c2cc451e231e97921df65207"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tcpwm_line. <br /></td></tr>
<tr class="separator:gae412e083c2cc451e231e97921df65207"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga26f39d579dedec1f490b827cda147add"><td class="memItemLeft" align="right" valign="top"><a id="ga26f39d579dedec1f490b827cda147add" name="ga26f39d579dedec1f490b827cda147add"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TCPWM_LINE_COMPL</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga26f39d579dedec1f490b827cda147add"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tcpwm_line_compl. <br /></td></tr>
<tr class="separator:ga26f39d579dedec1f490b827cda147add"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad14576af93681ee9a89540399cfedd9c"><td class="memItemLeft" align="right" valign="top"><a id="gad14576af93681ee9a89540399cfedd9c" name="gad14576af93681ee9a89540399cfedd9c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TCPWM_TR_ONE_CNT_IN</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gad14576af93681ee9a89540399cfedd9c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tcpwm_tr_one_cnt_in. <br /></td></tr>
<tr class="separator:gad14576af93681ee9a89540399cfedd9c"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="typedef-members" name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:ga65c44395eb0927bbf5f592510f5bfe9e"><td class="memItemLeft" align="right" valign="top"><a id="ga65c44395eb0927bbf5f592510f5bfe9e" name="ga65c44395eb0927bbf5f592510f5bfe9e"></a>
typedef <a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#ga341dd83dc02d2dce67fcb8694a5b4fd7">cyhal_gpio_tviibe1m_64_lqfp_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_gpio_t</b></td></tr>
<tr class="memdesc:ga65c44395eb0927bbf5f592510f5bfe9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create generic name for the series/package specific type. <br /></td></tr>
<tr class="separator:ga65c44395eb0927bbf5f592510f5bfe9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="enum-members" name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:ga341dd83dc02d2dce67fcb8694a5b4fd7"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#ga341dd83dc02d2dce67fcb8694a5b4fd7">cyhal_gpio_tviibe1m_64_lqfp_t</a> { <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a3dbd1016ea99d087d747530418b89a01">NC</a> = 0xFF
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a23d505c049c81443b12e53d5b00b1be9">P0_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_0, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a8c239764fe5c947cad341b176d49eb73">P0_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_0, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a950df72443b521531bc3be8f4058fd85">P0_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_0, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a7dd012609401076ec68c99a41fcf12bc">P0_3</a> = CYHAL_GET_GPIO(CYHAL_PORT_0, 3)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7aeeaaeb6232b5bd27b3d18c1699737e31">P2_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_2, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a33daef487e90b1d8ee897624249d060e">P2_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_2, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a702f0443ac82eec7db778039597602de">P5_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_5, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a6e81efad69a0ea034651af008bd857b9">P5_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_5, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a651caedfece9cfdc1054b06bdb19ef5c">P6_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_6, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a3e0cb355dfc40a09ddbcb3e2a646e186">P6_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_6, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a314f040c789cfa222f71ac693d4634b3">P6_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_6, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7ab8284593b459e295b454e59c33e16325">P6_3</a> = CYHAL_GET_GPIO(CYHAL_PORT_6, 3)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a41f81316d62acdf3935225be485ea96a">P6_4</a> = CYHAL_GET_GPIO(CYHAL_PORT_6, 4)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a03d2dd144727710aa3078b5b2736a9b6">P6_5</a> = CYHAL_GET_GPIO(CYHAL_PORT_6, 5)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a6d9a4b708799671207e957ca525f6713">P6_6</a> = CYHAL_GET_GPIO(CYHAL_PORT_6, 6)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a5501c381b48783a8f77a78093edc1549">P7_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_7, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a9818bf8780ec2ee3c063663dc227b339">P7_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_7, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a2b42f6ebe228e231b10f05e2b9516000">P7_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_7, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a21e56d1f2d4d8b0b5e9c64479b91181b">P8_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_8, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a0db0c6042c3ddaa4549286faf95bed5a">P8_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_8, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7ad8a1b111713dd51ed2e6984af7a100ad">P11_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_11, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7ae523468e21f17d454671c2b300892915">P11_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_11, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a5fe34b6d232f4550a7eb7fe679df2ef6">P11_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_11, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7aaf16470ca94fc271c6dfa85b686461e3">P12_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_12, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7ac6e8154eb8e09e91c630cd181399a0b9">P12_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_12, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a3e5cbec8950dbbdf6b28c2edf8b5de30">P13_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_13, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a7d9c8584fafbb18ba97cb26bcfde01dc">P13_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_13, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a170bca545242a6e5f76768d89d06536f">P13_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_13, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a584dd447670d12b4d08914d5c8ecc16e">P13_3</a> = CYHAL_GET_GPIO(CYHAL_PORT_13, 3)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a364d50a4e0e287628956fcedafd2cd14">P14_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_14, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a98d3818de8eed4e56eaa87bef3dcd8db">P14_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_14, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7ac93e73a420441e5ace8e41af5d6f3ca2">P14_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_14, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a68646e89c96e2bf59b3e1584f4d29a80">P18_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_18, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a641f22bd2369a8ac07e4e6c145d4218c">P18_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_18, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a5c31e2682e11a68d952c9844b70df3a7">P18_3</a> = CYHAL_GET_GPIO(CYHAL_PORT_18, 3)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7acb6f2fa215c2c77ef2dd718311d0d1bc">P18_4</a> = CYHAL_GET_GPIO(CYHAL_PORT_18, 4)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a85edf49dfa99d41fe6209082476c16be">P18_5</a> = CYHAL_GET_GPIO(CYHAL_PORT_18, 5)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7ae2daf3c4178e1f941bc03da9682661be">P18_6</a> = CYHAL_GET_GPIO(CYHAL_PORT_18, 6)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a25a187e72983849bdc21585fec03b80d">P18_7</a> = CYHAL_GET_GPIO(CYHAL_PORT_18, 7)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a48550d4f589e585a989319c1f9494e4c">P21_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_21, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7ad1f7de653b3077ff6378edfd2153b9ef">P21_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_21, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a848b44378a656b21ab50480faf883583">P21_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_21, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7ae7ae8c56bfa3a4337f48c352efb356b8">P21_3</a> = CYHAL_GET_GPIO(CYHAL_PORT_21, 3)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a8799b19bae738f4351ba84d4aaf85d62">P22_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_22, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7ae9f49b437f361fb50c8682ecd5d48eac">P23_3</a> = CYHAL_GET_GPIO(CYHAL_PORT_23, 3)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7af5c7cb5f83826932742ee1f8a6c226af">P23_4</a> = CYHAL_GET_GPIO(CYHAL_PORT_23, 4)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7a71c1b2bead45c60421729cd09277c830">P23_5</a> = CYHAL_GET_GPIO(CYHAL_PORT_23, 5)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7ad57d1dc3534accb6f5821816c5432a97">P23_6</a> = CYHAL_GET_GPIO(CYHAL_PORT_23, 6)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#gga341dd83dc02d2dce67fcb8694a5b4fd7aff09d95d8c422a3f260a4addeb7a42b5">P23_7</a> = CYHAL_GET_GPIO(CYHAL_PORT_23, 7)
<br />
 }</td></tr>
<tr class="memdesc:ga341dd83dc02d2dce67fcb8694a5b4fd7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Definitions for all of the pins that are bonded out on in the 64-LQFP package for the TVIIBE1M series.  <a href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#ga341dd83dc02d2dce67fcb8694a5b4fd7">More...</a><br /></td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="var-members" name="var-members"></a>
Variables</h2></td></tr>
<tr class="memitem:ga39bb3988bf033ae4a9b4cede255455fa"><td class="memItemLeft" align="right" valign="top"><a id="ga39bb3988bf033ae4a9b4cede255455fa" name="ga39bb3988bf033ae4a9b4cede255455fa"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_canfd_ttcan_rx</b> [7]</td></tr>
<tr class="memdesc:ga39bb3988bf033ae4a9b4cede255455fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the canfd_ttcan_rx signal. <br /></td></tr>
<tr class="separator:ga39bb3988bf033ae4a9b4cede255455fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaea7731e8b94e77aaa1ae2c3dd4bf4c48"><td class="memItemLeft" align="right" valign="top"><a id="gaea7731e8b94e77aaa1ae2c3dd4bf4c48" name="gaea7731e8b94e77aaa1ae2c3dd4bf4c48"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_canfd_ttcan_tx</b> [8]</td></tr>
<tr class="memdesc:gaea7731e8b94e77aaa1ae2c3dd4bf4c48"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the canfd_ttcan_tx signal. <br /></td></tr>
<tr class="separator:gaea7731e8b94e77aaa1ae2c3dd4bf4c48"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaac9dae56b5d90186a5109aead7259c2b"><td class="memItemLeft" align="right" valign="top"><a id="gaac9dae56b5d90186a5109aead7259c2b" name="gaac9dae56b5d90186a5109aead7259c2b"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_cal_sup_nz</b> [2]</td></tr>
<tr class="memdesc:gaac9dae56b5d90186a5109aead7259c2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_cal_sup_nz signal. <br /></td></tr>
<tr class="separator:gaac9dae56b5d90186a5109aead7259c2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaec325a7be768ac96ff1dfecfdbce5e59"><td class="memItemLeft" align="right" valign="top"><a id="gaec325a7be768ac96ff1dfecfdbce5e59" name="gaec325a7be768ac96ff1dfecfdbce5e59"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_clk_fm_pump</b> [1]</td></tr>
<tr class="memdesc:gaec325a7be768ac96ff1dfecfdbce5e59"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_clk_fm_pump signal. <br /></td></tr>
<tr class="separator:gaec325a7be768ac96ff1dfecfdbce5e59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacfad2dc59716f4d18b2219fb95f5bf4e"><td class="memItemLeft" align="right" valign="top"><a id="gacfad2dc59716f4d18b2219fb95f5bf4e" name="gacfad2dc59716f4d18b2219fb95f5bf4e"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_fault_out</b> [3]</td></tr>
<tr class="memdesc:gacfad2dc59716f4d18b2219fb95f5bf4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_fault_out signal. <br /></td></tr>
<tr class="separator:gacfad2dc59716f4d18b2219fb95f5bf4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0a3014b4578def49733175d7e7dbec9e"><td class="memItemLeft" align="right" valign="top"><a id="ga0a3014b4578def49733175d7e7dbec9e" name="ga0a3014b4578def49733175d7e7dbec9e"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_swj_swclk_tclk</b> [1]</td></tr>
<tr class="memdesc:ga0a3014b4578def49733175d7e7dbec9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_swj_swclk_tclk signal. <br /></td></tr>
<tr class="separator:ga0a3014b4578def49733175d7e7dbec9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1cdc8144f5c39110f8a87e4c1acd4176"><td class="memItemLeft" align="right" valign="top"><a id="ga1cdc8144f5c39110f8a87e4c1acd4176" name="ga1cdc8144f5c39110f8a87e4c1acd4176"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_swj_swdio_tms</b> [1]</td></tr>
<tr class="memdesc:ga1cdc8144f5c39110f8a87e4c1acd4176"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_swj_swdio_tms signal. <br /></td></tr>
<tr class="separator:ga1cdc8144f5c39110f8a87e4c1acd4176"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad2ba0f9b5a238e3d06237036845ae5ed"><td class="memItemLeft" align="right" valign="top"><a id="gad2ba0f9b5a238e3d06237036845ae5ed" name="gad2ba0f9b5a238e3d06237036845ae5ed"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_swj_swdoe_tdi</b> [1]</td></tr>
<tr class="memdesc:gad2ba0f9b5a238e3d06237036845ae5ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_swj_swdoe_tdi signal. <br /></td></tr>
<tr class="separator:gad2ba0f9b5a238e3d06237036845ae5ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaab3e5ef4da736a410b62a3b278ba67e4"><td class="memItemLeft" align="right" valign="top"><a id="gaab3e5ef4da736a410b62a3b278ba67e4" name="gaab3e5ef4da736a410b62a3b278ba67e4"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_swj_swo_tdo</b> [1]</td></tr>
<tr class="memdesc:gaab3e5ef4da736a410b62a3b278ba67e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_swj_swo_tdo signal. <br /></td></tr>
<tr class="separator:gaab3e5ef4da736a410b62a3b278ba67e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga136ac7e4cb74056238b8105b8ec6e58b"><td class="memItemLeft" align="right" valign="top"><a id="ga136ac7e4cb74056238b8105b8ec6e58b" name="ga136ac7e4cb74056238b8105b8ec6e58b"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_swj_trstn</b> [1]</td></tr>
<tr class="memdesc:ga136ac7e4cb74056238b8105b8ec6e58b"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_swj_trstn signal. <br /></td></tr>
<tr class="separator:ga136ac7e4cb74056238b8105b8ec6e58b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga688fc5ec21ba070262bbbac57cc05e66"><td class="memItemLeft" align="right" valign="top"><a id="ga688fc5ec21ba070262bbbac57cc05e66" name="ga688fc5ec21ba070262bbbac57cc05e66"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_trace_clock</b> [1]</td></tr>
<tr class="memdesc:ga688fc5ec21ba070262bbbac57cc05e66"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_trace_clock signal. <br /></td></tr>
<tr class="separator:ga688fc5ec21ba070262bbbac57cc05e66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac5cd6f0caf7cfdfc9b93f8245d3f4d6d"><td class="memItemLeft" align="right" valign="top"><a id="gac5cd6f0caf7cfdfc9b93f8245d3f4d6d" name="gac5cd6f0caf7cfdfc9b93f8245d3f4d6d"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_trace_data</b> [5]</td></tr>
<tr class="memdesc:gac5cd6f0caf7cfdfc9b93f8245d3f4d6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_trace_data signal. <br /></td></tr>
<tr class="separator:gac5cd6f0caf7cfdfc9b93f8245d3f4d6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa341d975f32cfa61fb0f3e272280c236"><td class="memItemLeft" align="right" valign="top"><a id="gaa341d975f32cfa61fb0f3e272280c236" name="gaa341d975f32cfa61fb0f3e272280c236"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_lin_lin_en</b> [5]</td></tr>
<tr class="memdesc:gaa341d975f32cfa61fb0f3e272280c236"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the lin_lin_en signal. <br /></td></tr>
<tr class="separator:gaa341d975f32cfa61fb0f3e272280c236"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga01514022018f54af8a3ff3b685862d59"><td class="memItemLeft" align="right" valign="top"><a id="ga01514022018f54af8a3ff3b685862d59" name="ga01514022018f54af8a3ff3b685862d59"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_lin_lin_rx</b> [8]</td></tr>
<tr class="memdesc:ga01514022018f54af8a3ff3b685862d59"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the lin_lin_rx signal. <br /></td></tr>
<tr class="separator:ga01514022018f54af8a3ff3b685862d59"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa99d93ea4641ab09f43ceb0dbb5cbc32"><td class="memItemLeft" align="right" valign="top"><a id="gaa99d93ea4641ab09f43ceb0dbb5cbc32" name="gaa99d93ea4641ab09f43ceb0dbb5cbc32"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_lin_lin_tx</b> [7]</td></tr>
<tr class="memdesc:gaa99d93ea4641ab09f43ceb0dbb5cbc32"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the lin_lin_tx signal. <br /></td></tr>
<tr class="separator:gaa99d93ea4641ab09f43ceb0dbb5cbc32"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga21ea208d7480eb047cc88e22a8e437ba"><td class="memItemLeft" align="right" valign="top"><a id="ga21ea208d7480eb047cc88e22a8e437ba" name="ga21ea208d7480eb047cc88e22a8e437ba"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_pass_sar_ext_mux_en</b> [1]</td></tr>
<tr class="memdesc:ga21ea208d7480eb047cc88e22a8e437ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the pass_sar_ext_mux_en signal. <br /></td></tr>
<tr class="separator:ga21ea208d7480eb047cc88e22a8e437ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadaa9f4cc1f80a3e37e580c6530179644"><td class="memItemLeft" align="right" valign="top"><a id="gadaa9f4cc1f80a3e37e580c6530179644" name="gadaa9f4cc1f80a3e37e580c6530179644"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_pass_sar_ext_mux_sel</b> [3]</td></tr>
<tr class="memdesc:gadaa9f4cc1f80a3e37e580c6530179644"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the pass_sar_ext_mux_sel signal. <br /></td></tr>
<tr class="separator:gadaa9f4cc1f80a3e37e580c6530179644"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab98a0a24ae8cfd13fbc746829da6c87e"><td class="memItemLeft" align="right" valign="top"><a id="gab98a0a24ae8cfd13fbc746829da6c87e" name="gab98a0a24ae8cfd13fbc746829da6c87e"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_pass_sarmux_pads</b> [27]</td></tr>
<tr class="memdesc:gab98a0a24ae8cfd13fbc746829da6c87e"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the pass_sarmux_pads signal. <br /></td></tr>
<tr class="separator:gab98a0a24ae8cfd13fbc746829da6c87e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d9b46ef78bfed5695ee34a96b3271ae"><td class="memItemLeft" align="right" valign="top"><a id="ga9d9b46ef78bfed5695ee34a96b3271ae" name="ga9d9b46ef78bfed5695ee34a96b3271ae"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_peri_tr_io_input</b> [8]</td></tr>
<tr class="memdesc:ga9d9b46ef78bfed5695ee34a96b3271ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the peri_tr_io_input signal. <br /></td></tr>
<tr class="separator:ga9d9b46ef78bfed5695ee34a96b3271ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9dc935f110b7314ffaa927253a11457f"><td class="memItemLeft" align="right" valign="top"><a id="ga9dc935f110b7314ffaa927253a11457f" name="ga9dc935f110b7314ffaa927253a11457f"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_peri_tr_io_output</b> [2]</td></tr>
<tr class="memdesc:ga9dc935f110b7314ffaa927253a11457f"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the peri_tr_io_output signal. <br /></td></tr>
<tr class="separator:ga9dc935f110b7314ffaa927253a11457f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9b9c0a983abb18b58992331807bc780f"><td class="memItemLeft" align="right" valign="top"><a id="ga9b9c0a983abb18b58992331807bc780f" name="ga9b9c0a983abb18b58992331807bc780f"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_i2c_scl</b> [6]</td></tr>
<tr class="memdesc:ga9b9c0a983abb18b58992331807bc780f"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_i2c_scl signal. <br /></td></tr>
<tr class="separator:ga9b9c0a983abb18b58992331807bc780f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga14e1c101cc39c665742a4204276024c2"><td class="memItemLeft" align="right" valign="top"><a id="ga14e1c101cc39c665742a4204276024c2" name="ga14e1c101cc39c665742a4204276024c2"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_i2c_sda</b> [8]</td></tr>
<tr class="memdesc:ga14e1c101cc39c665742a4204276024c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_i2c_sda signal. <br /></td></tr>
<tr class="separator:ga14e1c101cc39c665742a4204276024c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga03dc8c9efe4b7ee947a6f504071f7056"><td class="memItemLeft" align="right" valign="top"><a id="ga03dc8c9efe4b7ee947a6f504071f7056" name="ga03dc8c9efe4b7ee947a6f504071f7056"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_clk</b> [5]</td></tr>
<tr class="memdesc:ga03dc8c9efe4b7ee947a6f504071f7056"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_clk signal. <br /></td></tr>
<tr class="separator:ga03dc8c9efe4b7ee947a6f504071f7056"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8893626820c065205d9847082e41416"><td class="memItemLeft" align="right" valign="top"><a id="gac8893626820c065205d9847082e41416" name="gac8893626820c065205d9847082e41416"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_miso</b> [8]</td></tr>
<tr class="memdesc:gac8893626820c065205d9847082e41416"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_miso signal. <br /></td></tr>
<tr class="separator:gac8893626820c065205d9847082e41416"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga041c730b90d7f405946debd2677104c3"><td class="memItemLeft" align="right" valign="top"><a id="ga041c730b90d7f405946debd2677104c3" name="ga041c730b90d7f405946debd2677104c3"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_mosi</b> [7]</td></tr>
<tr class="memdesc:ga041c730b90d7f405946debd2677104c3"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_mosi signal. <br /></td></tr>
<tr class="separator:ga041c730b90d7f405946debd2677104c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf96bf0927531861cbaf9827b8441c5a9"><td class="memItemLeft" align="right" valign="top"><a id="gaf96bf0927531861cbaf9827b8441c5a9" name="gaf96bf0927531861cbaf9827b8441c5a9"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_select0</b> [5]</td></tr>
<tr class="memdesc:gaf96bf0927531861cbaf9827b8441c5a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_select0 signal. <br /></td></tr>
<tr class="separator:gaf96bf0927531861cbaf9827b8441c5a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe402d75c926a75ffbd74d91f61ade40"><td class="memItemLeft" align="right" valign="top"><a id="gafe402d75c926a75ffbd74d91f61ade40" name="gafe402d75c926a75ffbd74d91f61ade40"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_select1</b> [4]</td></tr>
<tr class="memdesc:gafe402d75c926a75ffbd74d91f61ade40"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_select1 signal. <br /></td></tr>
<tr class="separator:gafe402d75c926a75ffbd74d91f61ade40"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaae16431467a3f534b9f6ebc2213ad4b5"><td class="memItemLeft" align="right" valign="top"><a id="gaae16431467a3f534b9f6ebc2213ad4b5" name="gaae16431467a3f534b9f6ebc2213ad4b5"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_select2</b> [6]</td></tr>
<tr class="memdesc:gaae16431467a3f534b9f6ebc2213ad4b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_select2 signal. <br /></td></tr>
<tr class="separator:gaae16431467a3f534b9f6ebc2213ad4b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8bf005d96677757fa3d5924f8003b2cf"><td class="memItemLeft" align="right" valign="top"><a id="ga8bf005d96677757fa3d5924f8003b2cf" name="ga8bf005d96677757fa3d5924f8003b2cf"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_select3</b> [2]</td></tr>
<tr class="memdesc:ga8bf005d96677757fa3d5924f8003b2cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_select3 signal. <br /></td></tr>
<tr class="separator:ga8bf005d96677757fa3d5924f8003b2cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d38ea0e3c26ba70b8cc8e567799e6f8"><td class="memItemLeft" align="right" valign="top"><a id="ga4d38ea0e3c26ba70b8cc8e567799e6f8" name="ga4d38ea0e3c26ba70b8cc8e567799e6f8"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_clk</b> [5]</td></tr>
<tr class="memdesc:ga4d38ea0e3c26ba70b8cc8e567799e6f8"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_clk signal. <br /></td></tr>
<tr class="separator:ga4d38ea0e3c26ba70b8cc8e567799e6f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6f095b745603ea9442e396d9625e74c9"><td class="memItemLeft" align="right" valign="top"><a id="ga6f095b745603ea9442e396d9625e74c9" name="ga6f095b745603ea9442e396d9625e74c9"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_miso</b> [8]</td></tr>
<tr class="memdesc:ga6f095b745603ea9442e396d9625e74c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_miso signal. <br /></td></tr>
<tr class="separator:ga6f095b745603ea9442e396d9625e74c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa7e9e2f14a0eea38e8c933aefb2f9693"><td class="memItemLeft" align="right" valign="top"><a id="gaa7e9e2f14a0eea38e8c933aefb2f9693" name="gaa7e9e2f14a0eea38e8c933aefb2f9693"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_mosi</b> [7]</td></tr>
<tr class="memdesc:gaa7e9e2f14a0eea38e8c933aefb2f9693"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_mosi signal. <br /></td></tr>
<tr class="separator:gaa7e9e2f14a0eea38e8c933aefb2f9693"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0f75dcb3293c38d0616f23409ac8dc32"><td class="memItemLeft" align="right" valign="top"><a id="ga0f75dcb3293c38d0616f23409ac8dc32" name="ga0f75dcb3293c38d0616f23409ac8dc32"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_select0</b> [5]</td></tr>
<tr class="memdesc:ga0f75dcb3293c38d0616f23409ac8dc32"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_select0 signal. <br /></td></tr>
<tr class="separator:ga0f75dcb3293c38d0616f23409ac8dc32"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga28416f1c0f1b0b0cb651d8e348d10e79"><td class="memItemLeft" align="right" valign="top"><a id="ga28416f1c0f1b0b0cb651d8e348d10e79" name="ga28416f1c0f1b0b0cb651d8e348d10e79"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_select1</b> [4]</td></tr>
<tr class="memdesc:ga28416f1c0f1b0b0cb651d8e348d10e79"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_select1 signal. <br /></td></tr>
<tr class="separator:ga28416f1c0f1b0b0cb651d8e348d10e79"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga34881a26920874379f0f3c99bc49c5d9"><td class="memItemLeft" align="right" valign="top"><a id="ga34881a26920874379f0f3c99bc49c5d9" name="ga34881a26920874379f0f3c99bc49c5d9"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_select2</b> [6]</td></tr>
<tr class="memdesc:ga34881a26920874379f0f3c99bc49c5d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_select2 signal. <br /></td></tr>
<tr class="separator:ga34881a26920874379f0f3c99bc49c5d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab9c8f3a6d996db1aaf26a5229a1d463c"><td class="memItemLeft" align="right" valign="top"><a id="gab9c8f3a6d996db1aaf26a5229a1d463c" name="gab9c8f3a6d996db1aaf26a5229a1d463c"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_select3</b> [2]</td></tr>
<tr class="memdesc:gab9c8f3a6d996db1aaf26a5229a1d463c"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_select3 signal. <br /></td></tr>
<tr class="separator:gab9c8f3a6d996db1aaf26a5229a1d463c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17989079ac6faf78d5438c2537e7c677"><td class="memItemLeft" align="right" valign="top"><a id="ga17989079ac6faf78d5438c2537e7c677" name="ga17989079ac6faf78d5438c2537e7c677"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_uart_cts</b> [5]</td></tr>
<tr class="memdesc:ga17989079ac6faf78d5438c2537e7c677"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_uart_cts signal. <br /></td></tr>
<tr class="separator:ga17989079ac6faf78d5438c2537e7c677"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga447743b6c0ccd0c9d70897c08d714c1a"><td class="memItemLeft" align="right" valign="top"><a id="ga447743b6c0ccd0c9d70897c08d714c1a" name="ga447743b6c0ccd0c9d70897c08d714c1a"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_uart_rts</b> [5]</td></tr>
<tr class="memdesc:ga447743b6c0ccd0c9d70897c08d714c1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_uart_rts signal. <br /></td></tr>
<tr class="separator:ga447743b6c0ccd0c9d70897c08d714c1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5098be3181018fab7099f46ac1640b16"><td class="memItemLeft" align="right" valign="top"><a id="ga5098be3181018fab7099f46ac1640b16" name="ga5098be3181018fab7099f46ac1640b16"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_uart_rx</b> [8]</td></tr>
<tr class="memdesc:ga5098be3181018fab7099f46ac1640b16"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_uart_rx signal. <br /></td></tr>
<tr class="separator:ga5098be3181018fab7099f46ac1640b16"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabba34c938890f345c794b02e4b3b19dc"><td class="memItemLeft" align="right" valign="top"><a id="gabba34c938890f345c794b02e4b3b19dc" name="gabba34c938890f345c794b02e4b3b19dc"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_uart_tx</b> [7]</td></tr>
<tr class="memdesc:gabba34c938890f345c794b02e4b3b19dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_uart_tx signal. <br /></td></tr>
<tr class="separator:gabba34c938890f345c794b02e4b3b19dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga13e0c40a86a0e175db51f32cc86478ab"><td class="memItemLeft" align="right" valign="top"><a id="ga13e0c40a86a0e175db51f32cc86478ab" name="ga13e0c40a86a0e175db51f32cc86478ab"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tcpwm_line</b> [49]</td></tr>
<tr class="memdesc:ga13e0c40a86a0e175db51f32cc86478ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tcpwm_line signal. <br /></td></tr>
<tr class="separator:ga13e0c40a86a0e175db51f32cc86478ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafb6cbe7078720c8afd050906a07705d5"><td class="memItemLeft" align="right" valign="top"><a id="gafb6cbe7078720c8afd050906a07705d5" name="gafb6cbe7078720c8afd050906a07705d5"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tcpwm_line_compl</b> [50]</td></tr>
<tr class="memdesc:gafb6cbe7078720c8afd050906a07705d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tcpwm_line_compl signal. <br /></td></tr>
<tr class="separator:gafb6cbe7078720c8afd050906a07705d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga744890ceb69682015202da8dd5cf4e9b"><td class="memItemLeft" align="right" valign="top"><a id="ga744890ceb69682015202da8dd5cf4e9b" name="ga744890ceb69682015202da8dd5cf4e9b"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tcpwm_tr_one_cnt_in</b> [92]</td></tr>
<tr class="memdesc:ga744890ceb69682015202da8dd5cf4e9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tcpwm_tr_one_cnt_in signal. <br /></td></tr>
<tr class="separator:ga744890ceb69682015202da8dd5cf4e9b"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<hr/><h2 class="groupheader">Data Structure Documentation</h2>
<a name="structcyhal__resource__pin__mapping__t" id="structcyhal__resource__pin__mapping__t"></a>
<h2 class="memtitle"><span class="permalink"><a href="#structcyhal__resource__pin__mapping__t">&#9670;&nbsp;</a></span>cyhal_resource_pin_mapping_t</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">struct cyhal_resource_pin_mapping_t</td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="3">Data Fields</th></tr>
<tr><td class="fieldtype">
<a id="a4fa13cb0d2ae96aeeb50c0c0c63e3b91" name="a4fa13cb0d2ae96aeeb50c0c0c63e3b91"></a>uint8_t</td>
<td class="fieldname">
block_num</td>
<td class="fielddoc">
The block number of the resource with this connection. </td></tr>
<tr><td class="fieldtype">
<a id="a023ce9599d5a2fe07f82dd3cf5a7570b" name="a023ce9599d5a2fe07f82dd3cf5a7570b"></a>uint8_t</td>
<td class="fieldname">
channel_num</td>
<td class="fielddoc">
The channel number of the block with this connection. </td></tr>
<tr><td class="fieldtype">
<a id="a61f6033fdaae54a06ac8e63656b2a37a" name="a61f6033fdaae54a06ac8e63656b2a37a"></a><a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#ga707195ce0627016bf371643bdd9caa51">cyhal_gpio_t</a></td>
<td class="fieldname">
pin</td>
<td class="fielddoc">
The GPIO pin the connection is with. </td></tr>
<tr><td class="fieldtype">
<a id="ad4514be01ab83c7248c320b3232145c1" name="ad4514be01ab83c7248c320b3232145c1"></a>en_hsiom_sel_t</td>
<td class="fieldname">
hsiom</td>
<td class="fielddoc">
The HSIOM configuration value. </td></tr>
</table>

</div>
</div>
<h2 class="groupheader">Enumeration Type Documentation</h2>
<a id="ga341dd83dc02d2dce67fcb8694a5b4fd7" name="ga341dd83dc02d2dce67fcb8694a5b4fd7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga341dd83dc02d2dce67fcb8694a5b4fd7">&#9670;&nbsp;</a></span>cyhal_gpio_tviibe1m_64_lqfp_t</h2>

<div class="memitem">
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      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__group__hal__impl__pin__package__tviibe1m__64__lqfp.html#ga341dd83dc02d2dce67fcb8694a5b4fd7">cyhal_gpio_tviibe1m_64_lqfp_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Definitions for all of the pins that are bonded out on in the 64-LQFP package for the TVIIBE1M series. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a3dbd1016ea99d087d747530418b89a01" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a3dbd1016ea99d087d747530418b89a01"></a>NC&#160;</td><td class="fielddoc"><p >No Connect/Invalid Pin. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a23d505c049c81443b12e53d5b00b1be9" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a23d505c049c81443b12e53d5b00b1be9"></a>P0_0&#160;</td><td class="fielddoc"><p >Port 0 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a8c239764fe5c947cad341b176d49eb73" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a8c239764fe5c947cad341b176d49eb73"></a>P0_1&#160;</td><td class="fielddoc"><p >Port 0 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a950df72443b521531bc3be8f4058fd85" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a950df72443b521531bc3be8f4058fd85"></a>P0_2&#160;</td><td class="fielddoc"><p >Port 0 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a7dd012609401076ec68c99a41fcf12bc" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a7dd012609401076ec68c99a41fcf12bc"></a>P0_3&#160;</td><td class="fielddoc"><p >Port 0 Pin 3. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7aeeaaeb6232b5bd27b3d18c1699737e31" name="gga341dd83dc02d2dce67fcb8694a5b4fd7aeeaaeb6232b5bd27b3d18c1699737e31"></a>P2_0&#160;</td><td class="fielddoc"><p >Port 2 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a33daef487e90b1d8ee897624249d060e" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a33daef487e90b1d8ee897624249d060e"></a>P2_1&#160;</td><td class="fielddoc"><p >Port 2 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a702f0443ac82eec7db778039597602de" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a702f0443ac82eec7db778039597602de"></a>P5_0&#160;</td><td class="fielddoc"><p >Port 5 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a6e81efad69a0ea034651af008bd857b9" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a6e81efad69a0ea034651af008bd857b9"></a>P5_1&#160;</td><td class="fielddoc"><p >Port 5 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a651caedfece9cfdc1054b06bdb19ef5c" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a651caedfece9cfdc1054b06bdb19ef5c"></a>P6_0&#160;</td><td class="fielddoc"><p >Port 6 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a3e0cb355dfc40a09ddbcb3e2a646e186" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a3e0cb355dfc40a09ddbcb3e2a646e186"></a>P6_1&#160;</td><td class="fielddoc"><p >Port 6 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a314f040c789cfa222f71ac693d4634b3" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a314f040c789cfa222f71ac693d4634b3"></a>P6_2&#160;</td><td class="fielddoc"><p >Port 6 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7ab8284593b459e295b454e59c33e16325" name="gga341dd83dc02d2dce67fcb8694a5b4fd7ab8284593b459e295b454e59c33e16325"></a>P6_3&#160;</td><td class="fielddoc"><p >Port 6 Pin 3. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a41f81316d62acdf3935225be485ea96a" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a41f81316d62acdf3935225be485ea96a"></a>P6_4&#160;</td><td class="fielddoc"><p >Port 6 Pin 4. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a03d2dd144727710aa3078b5b2736a9b6" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a03d2dd144727710aa3078b5b2736a9b6"></a>P6_5&#160;</td><td class="fielddoc"><p >Port 6 Pin 5. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a6d9a4b708799671207e957ca525f6713" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a6d9a4b708799671207e957ca525f6713"></a>P6_6&#160;</td><td class="fielddoc"><p >Port 6 Pin 6. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a5501c381b48783a8f77a78093edc1549" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a5501c381b48783a8f77a78093edc1549"></a>P7_0&#160;</td><td class="fielddoc"><p >Port 7 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a9818bf8780ec2ee3c063663dc227b339" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a9818bf8780ec2ee3c063663dc227b339"></a>P7_1&#160;</td><td class="fielddoc"><p >Port 7 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a2b42f6ebe228e231b10f05e2b9516000" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a2b42f6ebe228e231b10f05e2b9516000"></a>P7_2&#160;</td><td class="fielddoc"><p >Port 7 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a21e56d1f2d4d8b0b5e9c64479b91181b" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a21e56d1f2d4d8b0b5e9c64479b91181b"></a>P8_0&#160;</td><td class="fielddoc"><p >Port 8 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a0db0c6042c3ddaa4549286faf95bed5a" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a0db0c6042c3ddaa4549286faf95bed5a"></a>P8_1&#160;</td><td class="fielddoc"><p >Port 8 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7ad8a1b111713dd51ed2e6984af7a100ad" name="gga341dd83dc02d2dce67fcb8694a5b4fd7ad8a1b111713dd51ed2e6984af7a100ad"></a>P11_0&#160;</td><td class="fielddoc"><p >Port 11 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7ae523468e21f17d454671c2b300892915" name="gga341dd83dc02d2dce67fcb8694a5b4fd7ae523468e21f17d454671c2b300892915"></a>P11_1&#160;</td><td class="fielddoc"><p >Port 11 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a5fe34b6d232f4550a7eb7fe679df2ef6" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a5fe34b6d232f4550a7eb7fe679df2ef6"></a>P11_2&#160;</td><td class="fielddoc"><p >Port 11 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7aaf16470ca94fc271c6dfa85b686461e3" name="gga341dd83dc02d2dce67fcb8694a5b4fd7aaf16470ca94fc271c6dfa85b686461e3"></a>P12_0&#160;</td><td class="fielddoc"><p >Port 12 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7ac6e8154eb8e09e91c630cd181399a0b9" name="gga341dd83dc02d2dce67fcb8694a5b4fd7ac6e8154eb8e09e91c630cd181399a0b9"></a>P12_1&#160;</td><td class="fielddoc"><p >Port 12 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a3e5cbec8950dbbdf6b28c2edf8b5de30" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a3e5cbec8950dbbdf6b28c2edf8b5de30"></a>P13_0&#160;</td><td class="fielddoc"><p >Port 13 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a7d9c8584fafbb18ba97cb26bcfde01dc" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a7d9c8584fafbb18ba97cb26bcfde01dc"></a>P13_1&#160;</td><td class="fielddoc"><p >Port 13 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a170bca545242a6e5f76768d89d06536f" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a170bca545242a6e5f76768d89d06536f"></a>P13_2&#160;</td><td class="fielddoc"><p >Port 13 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a584dd447670d12b4d08914d5c8ecc16e" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a584dd447670d12b4d08914d5c8ecc16e"></a>P13_3&#160;</td><td class="fielddoc"><p >Port 13 Pin 3. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a364d50a4e0e287628956fcedafd2cd14" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a364d50a4e0e287628956fcedafd2cd14"></a>P14_0&#160;</td><td class="fielddoc"><p >Port 14 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a98d3818de8eed4e56eaa87bef3dcd8db" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a98d3818de8eed4e56eaa87bef3dcd8db"></a>P14_1&#160;</td><td class="fielddoc"><p >Port 14 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7ac93e73a420441e5ace8e41af5d6f3ca2" name="gga341dd83dc02d2dce67fcb8694a5b4fd7ac93e73a420441e5ace8e41af5d6f3ca2"></a>P14_2&#160;</td><td class="fielddoc"><p >Port 14 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a68646e89c96e2bf59b3e1584f4d29a80" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a68646e89c96e2bf59b3e1584f4d29a80"></a>P18_0&#160;</td><td class="fielddoc"><p >Port 18 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a641f22bd2369a8ac07e4e6c145d4218c" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a641f22bd2369a8ac07e4e6c145d4218c"></a>P18_1&#160;</td><td class="fielddoc"><p >Port 18 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a5c31e2682e11a68d952c9844b70df3a7" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a5c31e2682e11a68d952c9844b70df3a7"></a>P18_3&#160;</td><td class="fielddoc"><p >Port 18 Pin 3. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7acb6f2fa215c2c77ef2dd718311d0d1bc" name="gga341dd83dc02d2dce67fcb8694a5b4fd7acb6f2fa215c2c77ef2dd718311d0d1bc"></a>P18_4&#160;</td><td class="fielddoc"><p >Port 18 Pin 4. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a85edf49dfa99d41fe6209082476c16be" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a85edf49dfa99d41fe6209082476c16be"></a>P18_5&#160;</td><td class="fielddoc"><p >Port 18 Pin 5. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7ae2daf3c4178e1f941bc03da9682661be" name="gga341dd83dc02d2dce67fcb8694a5b4fd7ae2daf3c4178e1f941bc03da9682661be"></a>P18_6&#160;</td><td class="fielddoc"><p >Port 18 Pin 6. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a25a187e72983849bdc21585fec03b80d" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a25a187e72983849bdc21585fec03b80d"></a>P18_7&#160;</td><td class="fielddoc"><p >Port 18 Pin 7. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a48550d4f589e585a989319c1f9494e4c" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a48550d4f589e585a989319c1f9494e4c"></a>P21_0&#160;</td><td class="fielddoc"><p >Port 21 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7ad1f7de653b3077ff6378edfd2153b9ef" name="gga341dd83dc02d2dce67fcb8694a5b4fd7ad1f7de653b3077ff6378edfd2153b9ef"></a>P21_1&#160;</td><td class="fielddoc"><p >Port 21 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a848b44378a656b21ab50480faf883583" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a848b44378a656b21ab50480faf883583"></a>P21_2&#160;</td><td class="fielddoc"><p >Port 21 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7ae7ae8c56bfa3a4337f48c352efb356b8" name="gga341dd83dc02d2dce67fcb8694a5b4fd7ae7ae8c56bfa3a4337f48c352efb356b8"></a>P21_3&#160;</td><td class="fielddoc"><p >Port 21 Pin 3. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a8799b19bae738f4351ba84d4aaf85d62" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a8799b19bae738f4351ba84d4aaf85d62"></a>P22_0&#160;</td><td class="fielddoc"><p >Port 22 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7ae9f49b437f361fb50c8682ecd5d48eac" name="gga341dd83dc02d2dce67fcb8694a5b4fd7ae9f49b437f361fb50c8682ecd5d48eac"></a>P23_3&#160;</td><td class="fielddoc"><p >Port 23 Pin 3. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7af5c7cb5f83826932742ee1f8a6c226af" name="gga341dd83dc02d2dce67fcb8694a5b4fd7af5c7cb5f83826932742ee1f8a6c226af"></a>P23_4&#160;</td><td class="fielddoc"><p >Port 23 Pin 4. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7a71c1b2bead45c60421729cd09277c830" name="gga341dd83dc02d2dce67fcb8694a5b4fd7a71c1b2bead45c60421729cd09277c830"></a>P23_5&#160;</td><td class="fielddoc"><p >Port 23 Pin 5. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7ad57d1dc3534accb6f5821816c5432a97" name="gga341dd83dc02d2dce67fcb8694a5b4fd7ad57d1dc3534accb6f5821816c5432a97"></a>P23_6&#160;</td><td class="fielddoc"><p >Port 23 Pin 6. </p>
</td></tr>
<tr><td class="fieldname"><a id="gga341dd83dc02d2dce67fcb8694a5b4fd7aff09d95d8c422a3f260a4addeb7a42b5" name="gga341dd83dc02d2dce67fcb8694a5b4fd7aff09d95d8c422a3f260a4addeb7a42b5"></a>P23_7&#160;</td><td class="fielddoc"><p >Port 23 Pin 7. </p>
</td></tr>
</table>

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